Back to Hacking the GRiDCase 1500 Series.
Most of this information came from the manual examination and testing of circuits with a multimeter and oscilliscope so beware that there is the potential for errors and typos.
The Expansion Pod Backplane and the Storage Backplane mainboard connectors carry most of the standard ISA BUS pins, as detailed below.
NOTE: The 1520 and 1530 have storage backplane headers, the 1550sx doesn’t. The 1550sx does however have the Pod backplane.
Pod Backplane (2 connectors on mainboard, 40+60 pin) Data source: manual examination of circuit
|
|
Pin |
Pin |
|
Connector 40 pin
|
DB15 |
1 |
2 |
LA23 |
DB14 |
3 |
4 |
LA22 |
DB13 |
5 |
6 |
LA21 |
DB12 |
7 |
8 |
LA20 |
DB11 |
9 |
10 |
LA19 |
DB10 |
11 |
12 |
LA18 |
DB09 |
13 |
14 |
LA17 |
DB08 |
15 |
16 |
|
GND |
17 |
18 |
IRQ10 |
DRQ7 |
19 |
20 |
IRQ11 |
DACK7# |
21 |
22 |
IRQ12 |
DRQ6 |
23 |
24 |
IRQ14 |
DACK6# |
25 |
26 |
IRQ15 |
DRQ5 |
27 |
28 |
MASTER# (FE3020.65) |
DACK5# |
29 |
30 |
MEMCS16# |
DRQ0 |
31 |
32 |
IOCS16# (FE3000.59) |
DACK0# |
33 |
34 |
SBHE# (FE3000.56) |
GND |
35 |
36 |
ZEROWS# |
(3.33 MHz) MEMRD# |
37 |
38 |
16V+ |
MEMWR# |
39 |
40 |
16V+ |
Connector 60 pin |
DB7 |
1 |
2 |
BALE (U42.03, 3.33 MHz) |
DB6 |
3
|
4
|
IOCK# (FE3000.58) |
DB5 |
5
|
6
|
IOCHRDY (FE3000.22) |
DB4 |
7
|
8
|
DRQ3 |
DB3 |
9
|
10
|
DACK3# |
DB2 |
11
|
12
|
DRQ2 |
DB1 |
13
|
14
|
DACK2# |
DB0 |
15
|
16
|
DRQ1 |
GND |
17
|
18
|
DACK1# |
ADD19 |
19
|
20
|
IRQ5 |
ADD18 |
21
|
22
|
IRQ3 |
ADD17 |
23
|
24
|
CLK (8.33 MHz) |
ADD16 |
25
|
26
|
IRQ4 |
ADD15 |
27
|
28
|
TC (U43.02) |
ADD14 |
29
|
30
|
AEN (U43.06) |
ADD13 |
31
|
32
|
RESET (U17.4) |
ADD12 |
33
|
34
|
REFRESH# (66 KHz) |
ADD11 |
35
|
36
|
IRQ6 |
ADD10 |
37
|
38
|
IOR# |
ADD9 |
39
|
40
|
IOW# |
ADD8 |
41
|
42
|
IRQ7 |
ADD7 |
43
|
44
|
SMEMW# (FE3020.78) |
ADD6 |
45
|
46
|
SMEMR# (FE3020.77) |
ADD5 |
47
|
48
|
IRQ9 |
ADD4 |
49
|
50
|
GRIDBITS# |
ADD3 |
51
|
52
|
5V+ |
ADD2 |
53
|
54
|
5V+ |
ADD1 |
55
|
56
|
12V+ |
(FE3020.51) ADD0 |
57
|
58
|
GND |
12V- |
59
|
60
|
OSC (14.3 MHz) |
Storage Backplane (2 connectors on mainboard, 60+60 pin) Data source: manual examination of circuit
|
|
Pin |
Pin |
|
Connector 60 pin (rear)
|
16V+ |
1 |
2 |
16V+ (SW) |
DRQ7 |
3 |
4 |
DB15 |
DACK7# |
5 |
6 |
DB14 |
DRQ6 |
7 |
8 |
DB13 |
DACK6# |
9 |
10 |
DB12 |
DRQ5 |
11 |
12 |
DB11 |
DACK5# |
13 |
14 |
DB10 |
DRQ3 |
15 |
16 |
DB9 |
DACK3# |
17 |
18 |
DB8 |
DRQ2 |
19 |
20 |
IRQ3 |
DACK2# |
21 |
22 |
IRQ4 |
DRQ1 |
23 |
24 |
IRQ5 |
DACK1# |
25 |
26 |
IRQ6 |
DRQ0 |
27 |
28 |
IRQ7 |
DACK0# |
29 |
30 |
IRQ9 |
IRQ11 |
31 |
32 |
IRQ10 |
IRQ12 |
33 |
34 |
5V+ |
IRQ14 |
35 |
36 |
OSC (14.3 MHz) |
IRQ15 |
37 |
38 |
GND |
MEMR |
39 |
40 |
IOCK# (FE3000.58) |
MEMW |
41
|
42
|
IOCHRDY (FE3000.22) |
GND |
43
|
44
|
ALE (3.33 MHz) |
LA23 |
45
|
46
|
SBHE (FE3020.56) |
LA22 |
47
|
48
|
TC (U43.02) |
LA21 |
49
|
50
|
REFRESH |
LA20 |
51
|
52
|
IOCS16# (FE3000.59) |
LA19 |
53
|
54
|
MEMCS16# |
LA18 |
55
|
56
|
MASTER |
LA17 |
57
|
58
|
12V- |
12V+ |
59
|
60
|
CLK (8.33 MHz) |
Connector 60 pin (front) |
(U3) GRIDBITS3RD |
1 |
2 |
ADD19 (FE3020.1) |
(U4) GRIDBITS3WR |
3
|
4
|
ADD18 (FE3020.5) |
5V+ |
5
|
6
|
ADD17 |
GND |
7
|
8
|
ADD16 |
Mode FDD02 |
9
|
10
|
ADD15 |
Index FDD08 |
11
|
12
|
ADD14 |
(U38.15) DrSel1? FDD12 |
13
|
14
|
ADD13 |
(U38.14) DrSel2? FDD14 |
15
|
16
|
ADD12 |
(U38.13) Motor FDD16 |
17
|
18
|
ADD11 |
(U38.12) DrSel0 FDD10 |
19
|
20
|
ADD10 (FE3020.25) |
Dir FDD18 |
21
|
22
|
GND |
Step FDD20 |
23
|
24
|
ADD9 (FE3020.27) |
WrData FDD22 |
25
|
26
|
ADD8 |
WrGate FDD24 |
27
|
28
|
ADD7 |
Trk0 FDD26 |
29
|
30
|
ADD6 |
WrProt FDD28 |
31
|
32
|
ADD5 |
RdData FDD30 |
33
|
34
|
ADD4 |
SideSel FDD32 |
35
|
36
|
ADD3 |
DskChg FDD34 |
37
|
38
|
ADD2 |
GND? |
39
|
40
|
ADD1 (FE3020.50) |
(BP.U4.CLR) RESET# |
41
|
42
|
ADD0 (FE3020.51) |
(BP.IDE.39) IDE ACTIVE |
43
|
44
|
GND |
5V+ |
45
|
46
|
DB7 |
12V+ |
47
|
48
|
DB6 |
(U43.06) AEN |
49
|
50
|
DB5 |
IOR |
51
|
52
|
DB4 |
IOW |
53
|
54
|
DB3 |
GND |
55
|
56
|
DB2 |
(FE3020.77) SMEMR# |
57
|
58
|
DB1 |
(FE3020.78) SMEMW# |
59
|
60
|
DB0 |